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SN74AC373MDWREP

IC D-TYPE TRANSP 8:8 20-SOIC

Part Number
SN74AC373MDWREP
Manufacturer
Texas Instruments
Category
Latches
Package
20-SOIC (0.295", 7.50mm Width)
Datasheet:
SN74AC373MDWREP.pdf
Description
IC D-TYPE TRANSP 8:8 20-SOIC
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PRODUCT INFORMATION

Product Details

PRODUCT TECHNICAL REFERENCE

SN74AC373MDWREP Enhanced Product Octal D-Type Transparent Latch with 3-State Outputs

A comprehensive technical overview of the SN74AC373MDWREP, an Enhanced Product (EP) octal D-type transparent latch from Texas Instruments featuring 2-V to 6-V VCC operation, 9.5 ns max propagation delay at 5 V, 3-state noninverting outputs, and extended temperature range of –55°C to 125°C. Covers device function, core features, electrical specifications, 20-lead SOIC package, pin configuration, typical applications, and replacement selection guidance.

Texas Instruments 20-SOIC 2V to 6V
Device Classification Octal D-Type Transparent Latch with 3-State Outputs
Part Number
SN74AC373MDWREP
Mounting Type
Surface Mount
Operating Temperature Range
-55°C to +125°C
01
PRODUCT OVERVIEW

What Is the SN74AC373MDWREP?

SN74AC373MDWREP is an Enhanced Product (EP) octal D-type transparent latch from Texas Instruments, part of the SN74AC373-EP family. The device features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads.

The device consists of eight D-type transparent latches with 3-state outputs. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. OE does not affect the internal operations of the latches, allowing old data to be retained or new data to be entered while the outputs are in the high-impedance state.

The EP designation provides support for defense, aerospace, and medical applications with controlled baseline, extended product life cycle, extended product-change notification, product traceability, and qualification pedigree. The device is characterized for operation from –55°C to +125°C. The SN74AC373MDWREP is offered in a 20-lead SOIC (DW) package.

Octal Transparent Latch Eight D-type latches with 3-state outputs for bus-oriented systems.
Wide Voltage Operation 2-V to 6-V VCC operation with 9.5 ns max propagation delay at 5 V.
Enhanced Product (EP) Supports defense, aerospace, and medical applications with –55°C to 125°C temperature range and qualification pedigree.
02
DEVICE HIGHLIGHTS

Key Features and Benefits of SN74AC373MDWREP

Octal Transparent Latch with 3-State Outputs

Eight D-type transparent latches with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads.

Wide Supply Voltage Range

Operates from 2 V to 6 V VCC, supporting 2.5-V, 3.3-V, and 5-V logic levels.

High-Speed Performance

Maximum propagation delay of 9.5 ns at 5 V ensures fast signal propagation for high-speed bus applications.

Enhanced Product (EP) Qualification

Supports defense, aerospace, and medical applications with controlled baseline, extended product life cycle, qualification pedigree, and –55°C to 125°C operation.

3-State Noninverting Outputs

3-state noninverting outputs drive bus lines directly without need for interface or pullup components.

20-Lead SOIC Package

Available in a 20-lead SOIC (DW) package with top-side marking "SAC373MEP".

03
REFERENCE DATA

Technical Specifications for SN74AC373MDWREP

Part Number SN74AC373MDWREP Manufacturer Texas Instruments
Device Type Octal D-Type Transparent Latch with 3-State Outputs Logic Family AC
Number of Channels 8 Circuit Configuration 8:8
Output Type 3-State, Noninverting Supply Voltage (VCC) 2 V to 6 V
Propagation Delay (Max) 9.5 ns at 5 V Propagation Delay (Typical) 7.5 ns
Setup Time 4 ns Output Current (High, Low) 24 mA, 24 mA
Input Voltage (VI) Up to 6 V Package / Case 20-SOIC (0.295", 7.50mm Width)
Supplier Device Package 20-SOIC Package Body Size 12.80mm × 7.50mm
Mounting Type Surface Mount Package Height 2.35 mm
Operating Temperature (EP) -55°C to +125°C Moisture Sensitivity Level Level-1-260C-UNLIM
RoHS Green (RoHS & no Sb/Br) Lead Finish / Ball Material CU NIPDAU
Packaging Tape & Reel (2,000 per Reel) Reel Diameter 330 mm
Product Status ACTIVE Device Marking SAC373MEP
V62/04621-01XE V62/04621-01XE US ECCN EAR99

Electrical values shown above are reference values. Test conditions, limits, and guaranteed performance should always be confirmed from the current official manufacturer datasheet before design or production use. Enhanced Product specifications apply over the temperature range of –55°C to 125°C.

04
DESIGN REFERENCE

Circuit Considerations for SN74AC373MDWREP

Power Supply & Decoupling

The SN74AC373MDWREP requires proper power supply design for optimal performance:

  • Supply Voltage: Operates with VCC from 2 V to 6 V
  • Decoupling: Place a ceramic capacitor (0.1 µF) close to the VCC pin to minimize supply noise
  • Input Voltage: Inputs accept voltages up to 6 V
  • Ioff Support: Supports partial-power-down mode with Ioff circuitry to prevent backflow current

PCB and Signal Integrity Guidance

Latch performance depends on layout and signal routing:

  • Output Enable Control: To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver
  • Latch Enable: When LE is high, Q outputs follow D inputs; when LE is low, Q outputs are latched at the logic levels set up at the D inputs
  • 3-State Outputs: When OE is high, outputs are in the high-impedance state, allowing multiple outputs to be connected to a common bus
  • Ground Plane: Use a solid ground plane to minimize noise and ensure low-inductance return paths
  • Trace Routing: Keep bus traces short and maintain controlled impedance for high-speed operation
  • PCB Layout: Follow the recommended PCB footprint from the official datasheet prior to production
05
20-LEAD SOIC (12.80mm × 7.50mm)

Pin Configuration Reference for SN74AC373MDWREP

SAC373MEP
SOIC TOP VIEW

Confirm package orientation and pin numbering against the official package drawing before PCB layout. The SOIC (DW) package has 20 pins with a 12.80mm × 7.50mm body size. Device marking for the SN74AC373MDWREP is "SAC373MEP".

1 OE Output Enable (Active Low) - Places outputs in normal logic state or high-impedance state
2 1Q Data Output for Latch 1
3 1D Data Input for Latch 1
4 2D Data Input for Latch 2
5 2Q Data Output for Latch 2
6 3Q Data Output for Latch 3
7 3D Data Input for Latch 3
8 4D Data Input for Latch 4
9 4Q Data Output for Latch 4
10 GND Ground
11 LE Latch Enable - When high, Q outputs follow D inputs; when low, Q outputs are latched
12 5Q Data Output for Latch 5
13 5D Data Input for Latch 5
14 6D Data Input for Latch 6
15 6Q Data Output for Latch 6
16 7Q Data Output for Latch 7
17 7D Data Input for Latch 7
18 8D Data Input for Latch 8
19 8Q Data Output for Latch 8
20 VCC Positive Power Supply (2 V to 6 V)
06
APPLICATION AREAS

Typical Applications for SN74AC373MDWREP

Buffer Registers

Suitable for implementing buffer registers in bus-oriented systems with 3-state outputs.

I/O Ports

Provides I/O port expansion with transparent latching and 3-state outputs for microprocessor and microcontroller systems.

Bidirectional Bus Drivers

Drives bus lines in bus-organized systems without need for interface or pullup components.

Defense & Aerospace Systems

Enhanced Product (EP) qualification with controlled baseline and –55°C to 125°C temperature range supports military and aerospace applications.

Working Registers

Implements working registers for data storage and manipulation in digital systems.

Medical Instrumentation

EP qualification and wide temperature range support medical diagnostic equipment requiring high reliability.

07
REPLACEMENT GUIDANCE

Selecting an Alternative for SN74AC373MDWREP

A replacement for the SN74AC373MDWREP should not be selected solely by product category. The electrical characteristics, package, and pin configuration must be evaluated against the specific circuit requirements. The following alternatives are documented in the official Texas Instruments datasheet and product pages.

8 D-type transparent latches with 3-state outputs
Supply voltage: 2 V to 6 V
Propagation delay: 9.5 ns max at 5 V
Output current: 24 mA (high and low)
Package: 20-SOIC (DW)
Temperature range: –55°C to 125°C (EP)
3-state noninverting outputs
Full parallel access for loading

Packaging alternatives (same package, different carrier):

Part Number Package Carrier SPQ Temperature Range
SN74AC373MDWREP 20-SOIC (DW) Tape & Reel 2,000 -55°C to 125°C

The SN74AC373MDWREP is the Enhanced Product (EP) version of the octal transparent latch in 20-SOIC (DW) package with tape-and-reel packaging (2,000 units per reel). The device is characterized for operation from –55°C to 125°C. For commercial temperature range (0°C to 85°C) or industrial temperature range (–40°C to 85°C) versions in the same package, refer to the SN74AC373DW or SN74AC373DW-EP product pages. Select based on temperature requirements.

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MANUFACTURER INFORMATION

Texas Instruments

The SN74AC373-EP (SN74AC373MDWREP) belongs to the SN74AC373 family of octal D-type transparent latches with 3-state outputs from Texas Instruments. The device is designed for 2-V to 6-V VCC operation and features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The Enhanced Product (EP) designation provides support for defense, aerospace, and medical applications with controlled baseline, extended product life cycle, extended product-change notification, product traceability, and qualification pedigree. The SN74AC373-EP is characterized for operation from –55°C to 125°C and is available in a 20-lead SOIC (DW) package.

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Haishengye Electronics provides electronic component stock supply, BOM sourcing, quotation support, and quality inspection services for SN74AC373MDWREP and related devices.

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Technical Information Disclaimer

This technical guide is provided for product identification and preliminary reference only. Electrical limits, package dimensions, pin configuration, product status, and application suitability must be verified using current official manufacturer documentation before design, procurement, or production.

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Specifications

Product Attribute
Attribute Value
Part Number
SN74AC373MDWREP
Manufacturer
Texas Instruments
Package
20-SOIC (0.295", 7.50mm Width)
Series
74AC
Package/Case
20-SOIC (0.295", 7.50mm Width)
Packaging
Tape & Reel (TR)
Product Status
Active
Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
2V ~ 6V
Independent Circuits
1
Delay Time - Propagation
7.5ns
Current - Output High, Low
24mA, 24mA
Operating Temperature
-55°C ~ 125°C
Grade
-
Qualification
-
Mounting Type
Surface Mount
Supplier Device Package
20-SOIC

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Step 3 anti-static bag packaging
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Step 4 Inner Carton
Step 5 shipping label
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Packaging may be adjusted according to product type, quantity, moisture sensitivity and destination requirements.

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Part Number
SN74AC373MDWREP
Manufacturer
Texas Instruments
Package
20-SOIC (0.295", 7.50mm Width)
Category
Latches
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